Error to run VIIRS SDR in ADL5 using new LUT

[wzchen]

I am testing J1's prelanuch LUTs set in ADL Block2. The ViirsGEO passed, but the ProSdrViirsCalController failed. However, I can't not locate which LUT actually cause the problem from the log file.

I saw the following message:
Error retrieving N_LEOA_Flag VIIRS-SCIENCE-RDR-Verified
Is it related to any LUT?

Please help,
Thanks,

[kbisanz]

The N_LEOA_Flag usually doesn't cause an issue. The log file seems to stop all of a sudden in the middle of a log message. Did the algorithm have a segmentation fault or stop immediately for another reason?

Looking at the log file quickly, I don't see anything wrong.

[wzchen]

I made two runs. One with original LUT set, the other one with updated LUT set. The original set has no problem, but the updated set stopped at the last step. I ran 3 granlues. They all stopped suddenly. Where can I find core dump file? BTW, Here is an the screen print out:


**********************************************************************************
Constructing Algorithm Chain...
Construction Complete.

Validating Algorithm Chain Prior to Run...
Validation Complete.

Algorithm Chain and Status:
ProSdrViirsGeoController:A1:J01000078172065:Not Yet Built
ProSdrViirsGeoController:A1:J01000078172918:Built
ProSdrViirsGeoController:A1:J01000078173772:Built
ProSdrViirsCalController:A1:J01000078172918:Not Yet Built

Delta Algorithm Chain Run Started...
Running Algorithms With 2 Threads.

Algorithm Chain Queue:
ProSdrViirsGeoController:A1:J01000078172065:Not Yet Built
ProSdrViirsCalController:A1:J01000078172918:Not Yet Built

Running ProSdrViirsGeoController.exe for granule ID J01000078172065:A1
Success for ProSdrViirsGeoController.exe with granule ID J01000078172065
Running ProSdrViirsCalController.exe for granule ID J01000078172918:A1
Algorithm Run Failure - ProSdrViirsCalController, J01000078172918 Failed During Execution!
Algorithm Run Failure - ProSdrViirsCalController, J01000078172918 Algorithm Stopped Early or Core Dumped!

-----------------Failure Details Start---------------------
Output Product: VIIRS-M1-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M1-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M2-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M2-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M3-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M3-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M4-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M4-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M5-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M5-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M6-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M6-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M7-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M7-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M8-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M8-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M9-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M9-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M10-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M10-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M11-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M11-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M12-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M12-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M13-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M14-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M14-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M15-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M15-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M16-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-M16-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I1-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I1-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I2-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I2-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I3-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I3-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I4-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I4-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I5-FSDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-I5-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-DNB-SDR
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-DualGain-Cal-IP
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

Output Product: VIIRS-OBC-IP
Product Creation Date Time: 2015-07-22 19:36:44.122000
Dataset Lock: 1

-----------------Failure Details End---------------------
Error: An Algorithm in the Chain has Failed to Complete Successfully!
Chain Run did not Completed Successfully!


J01000078172918 : VIIRS-SDR 5.08333333333333 min.

[kbisanz]

The core file is usually written to the current directory (the directory from which you started the chain runner). If you don't find a core I would suggest trying to run the algorithm manually. The chain runner creates LW files and puts them in $ADL_HOME/log. They're named "<algorithmName>_<GranuleId>.xml". So try running:

Code: Select all

$ADL_HOME/bin/ProSdrViirsCalController.exe $ADL_HOME/log/ProSdrViirsCalController_J01000078172918.xml

If you're using new LUTs, are you certain the data is the correct endianness? The ByteOrder metadata should indicate the endianness of the data. If the ByteOrder metadata is not present, the assumption is big endian (which is AIX as used by sustainment). I'm assuming you're running on a little endian platform. If you execute "cat /proc/cpuinfo" and you have Intel CPUs, it's almost certainly a little endian machine. If it's a little endian machine, each of your LUTs *must* have ByteOrder metadata with the value "LE".

I'm looking back at your log file. Most files have a message like this:

Code: Select all

2015-07-22 18:14:52.140000Z DBG_LOW ProCmnInputItem.cpp(980)[ProSdrViirsCalC (47296602770880)]: Both data and platform endianness are the same for input data item with groupName "ObcErLut".  Data endian conversion was not performed.

However, there is this message:

Code: Select all

2015-07-22 18:14:52.121000Z DBG_HIGH ProCmnInputItem.cpp(936)[ProSdrViirsCalC (47296602770880)]: Converted endianness of data for VIIRS-RSBAUTOCAL-HISTORY-AUX

This would indicate that the endianness of VIIRS-RSBAUTOCAL-HISTORY-AUX and your platform are different. Is that correct?